1. [Field of the Invention]
The present invention relates to a so-called DELTA (DEpleted Lean channel TrAnsistor) semiconductor device and a method of fabricating the same.
2. [Description of the Related Art]
A so-called DELTA semiconductor element has attracted attention as a semiconductor element meeting demands for a finer diffusion layer and a higher integration degree in recent years. This semiconductor element has an SOI structure in which a pillar projecting semiconductor layer is formed on a semiconductor substrate via an insulating layer for element isolation, a gate electrode is formed to cover a central portion of this semiconductor layer via a gate insulating film, and a source and a drain are formed in the semiconductor layer on the two sides of the gate electrode. A channel between the source and the drain is depleted to achieve high drivability.
More specifically, Japanese Patent Laid-Open No. 6-310595 has disclosed a method of forming an element isolation region above a semiconductor substrate including a pillar projection by ion-implanting oxygen into the semiconductor substrate.
Also, Japanese Patent Laid-Open No. 5-198817 or 4-294585 has disclosed a structure in which a gate electrode is so formed as to bury upper and lower portions of a pillar projection or a trench and a source and a drain are formed on the bottom of the trench.
Furthermore, as one example of semiconductor devices similar to the DELTA semiconductor device, Japanese Patent Laid-Open No. 1-248557 has disclosed a semiconductor device in which a gate electrode is so formed as to surround the side surfaces of a pillar projection formed on a semiconductor substrate, diffusion regions serving as a source and a drain are formed on the upper surface of the pillar projection and in the semiconductor substrate around the pillar projection, and a capacitor is so formed as to be connected to the diffusion region on the upper surface of the pillar projection.
In the semiconductor device disclosed in Japanese Patent Laid-Open No. 6-310595, however, an element isolation insulating film must be formed on a semiconductor substrate, although the film is not a thick oxide film such as a field oxide film formed by a LOCOS process. This unavoidably complicates the fabrication process.
In the semiconductor device disclosed in Japanese Patent Laid-Open No. 5-198817 or 4-294585, only a source and a drain are formed in upper and lower portions of a pillar projection formed on a semiconductor substrate. That is, this device structure does not meet demands for multiple channels in recent years.
In the semiconductor device disclosed in Japanese Patent Laid-Open No. 1-248557, agate electrode is so formed as to cover the side surfaces of a pillar projection by anisotropic etching. Therefore, it is impossible to make the film thickness and the shape of the gate electrode uniform. Consequently, the shape of the gate electrode becomes very difficult to control as the dimensions of an element are further decreased.
It is an object of the present invention to provide a semiconductor device having three channels corresponding to a pair of a source and a drain, selectively formed on the same semiconductor substrate as a common bulk transistor, and having a very fine structure and high drivability, and a method of fabricating this semiconductor device.
A semiconductor device of the present invention is a semiconductor device comprising a gate, a source, and a drain, wherein a surface of a semiconductor substrate is processed into a shape having a pillar projection which functions as an element active region, the gate is formed via a gate insulating film so as to cover a substantially central portion of a surface of the pillar projection, the source and drain are formed by doping an impurity into portions of the pillar projection on two sides of the gate, and an element isolation insulating film is so formed on the semiconductor substrate as to bury side surfaces of the pillar projection, and said gate electrode is formed between at least a part of side surfaces of said element isolation insulating film and said pillar projection, with in a space between side surfaces of said element isolation insulating film and a gate insulating film formed on the side surfaces of said pillar projection.
Another aspect of the semiconductor device of the present invention comprises a semiconductor substrate processed into a shape having an integrally formed pillar projection on a surface, a conductive film formed by patterning via a first insulating film so as to cover a substantially central portion of a surface of the pillar projection, a pair of diffusion regions formed by doping an impurity into portions of the pillar projection on two sides of the conductive film, and a second insulating film so formed on the semiconductor substrate as to bury side surfaces of the pillar projection, and said conductive film comprises an extension portion extending on said second insulating film.
Still another aspect of the semiconductor device of the present invention comprises a semiconductor substrate processed into a shape having an integrally formed pillar projection on a surface, first and second conductive films formed via a first insulating film so as to cover substantially central portions of two side surfaces of the pillar projection and opposing each other while electrically isolated from each other, a third conductive film formed via a second insulating film so as to cover a substantially central portion of an upper surface of the pillar projection and electrically isolated from the first and second conductive films, a pair of diffusion regions formed by doping an impurity into portions of the pillar projection on two sides of the first, second, and third conductive films, and a third insulating film so formed on the semiconductor substrate as to bury the side surfaces of the pillar projection.
Still another aspect of the semiconductor device of the present invention comprises a semiconductor substrate processed into a shape having an integrally formed pillar projection on a surface, first and second conductive films formed via a first insulating film so as to cover substantially central portions of two side surfaces of the pillar projection and opposing each other while electrically isolated from each other via the first insulating film and the pillar projection, diffusion regions formed by doping an impurity into an upper surface region of the pillar projection and a surface region of the semiconductor substrate below the first and second conductive films formed via the first insulating film, and a second insulating film so formed on the semiconductor substrate as to bury the side surfaces of the pillar projection.
Still another aspect of the semiconductor device of the present invention is a semiconductor device comprising a semiconductor substrate and first, second, and third transistors having first, second, and third gates and a source and a drain shared by the first, second, and third gates, wherein the semiconductor substrate is processed into a shape having a pillar projection which functions as an element active region on a surface, the first and second gates are formed via a first gate insulating film so as to cover substantially central portions of two side surfaces of the pillar projection and oppose each other while electrically isolated from each other, the third gate is formed via a second gate insulating film so as to cover a substantially central portion of an upper surface of the pillar projection and electrically isolated from the first and second gates, the source and drain are formed by doping an impurity into portions of the pillar projection on two sides of the first, second, and third gates, and an element isolation insulating film is so formed on the semiconductor substrate as to bury side surfaces of the pillar projection.
Still another aspect of the semiconductor device of the present invention is a semiconductor device comprising a semiconductor substrate and first and second transistors having first and second gates and a source and a drain shared by the first and second gates, wherein the semiconductor substrate is processed into a shape having a pillar projection which functions as an element active region on a surface, the first and second gates are formed via a gate insulating film so as to cover a substantially central portion of a surface of the pillar projection and oppose each other while electrically isolated from each other, the source is formed by doping an impurity into a surface region of the semiconductor substrate below the pillar projection, the drain is formed by doping an impurity into an upper surface region of the pillar projection, and an element isolation insulating film is so formed on the semiconductor substrate as to bury side surfaces of the pillar projection.
A method of fabricating a semiconductor device of the present invention comprises the first step of forming a first insulating film having a low etching rate on a semiconductor substrate, the second step of processing the first insulating film and the semiconductor substrate to form a pillar projection having a predetermined width on a surface of the semiconductor substrate, the third step of forming a second insulating film only on side surfaces of the pillar projection and the first insulating film, the fourth step of forming a third insulating film having an enough thickness to bury the pillar projection and the first insulating film and polishing the third insulating film by using the first insulating film as a stopper, the fifth step of partially removing the second and third insulating films together with the first insulating film, the sixth step of forming narrow gaps by selectively removing portions of the second insulating film, thereby exposing portions of the two side surfaces of the pillar projection and portions of the surface of the semiconductor substrate near the pillar projection, the seventh step of forming a fourth insulating film covering inner walls of the narrow gaps, the eighth step of forming a conductive film on the third insulating film so as to bury the narrow gaps via the fourth insulating film and processing the conductive film into a predetermined shape, and the ninth step of doping an impurity into the pillar projection to form a pair of diffusion regions on two sides of the conductive film.
Another aspect of the method of fabricating a semiconductor device of the present invention comprises the first step of forming a first insulating film having a low etching rate on a semiconductor substrate, the second step of processing the first insulating film and the semiconductor substrate to form a pillar projection having a predetermined width on a surface of the semiconductor substrate, the third step of forming a second insulating film only on side surfaces of the pillar projection and the first insulating film, the fourth step of forming a third insulating film having an enough thickness to bury the pillar projection and the first insulating film and polishing the third insulating film by using the first insulating film as a stopper, the fifth step of partially removing the second and third insulating films together with the first insulating film, the sixth step of forming narrow gaps by selectively removing portions of the second insulating film, thereby exposing portions of the two side surfaces of the pillar projection and portions of the surface of the semiconductor substrate near the pillar projection, the seventh step of forming a fourth insulating film covering inner walls of the narrow gaps, the eighth step of forming a first conductive film on the third insulating film so as to bury the narrow gaps via the fourth insulating film and processing the first conductive film into a predetermined shape, the ninth step of forming a pair of diffusion regions by doping an impurity into the pillar projection by using the first conductive film as a mask, the tenth step of processing the first conductive film to divide the first conductive film via the fourth insulating film on the pillar projection, and the eleventh step of forming, by patterning, a second conductive film opposing an upper surface of the pillar projection via the fourth insulating film and insulated from the first conductive film.
Still another aspect of the method of fabricating a semiconductor device of the present invention comprises the first step of forming a first insulating film on a semiconductor substrate by patterning and forming a second insulating film so as to cover the first insulating film, the second step of anisotropically etching an entire surface of the second insulating film to leave the second insulating film behind only on side surfaces of the first insulating film, the third step of selectively removing only the first insulating film, the fourth step of processing the semiconductor substrate by using the second insulating film as a mask, thereby forming a pillar projection having a predetermined width on a surface of the semiconductor substrate, the fifth step of forming a third insulating film only on side surfaces of the pillar projection, the sixth step of forming a fourth insulating film having an enough thickness to bury the pillar projection and the second insulating film and polishing the fourth insulating film by using the second insulating film as a stopper, the seventh step of partially removing the third and fourth insulating films together with the second insulating film, the eighth step of forming narrow gaps by selectively removing portions of the third insulating film, thereby exposing portions near the two side surfaces of the pillar projection and portions of the surface of the semiconductor substrate near the pillar projection, the ninth step of forming a fifth insulating film covering inner walls of the narrow gaps, the tenth step of forming a conductive film on the fourth insulating film so as to bury the narrow gaps via the fifth insulating film and processing the conductive film into a predetermined shape, and the eleventh step of forming a pair of diffusion regions by doping an impurity into the pillar projection by using the conductive film as a mask.
Still another aspect of the method of fabricating a semiconductor device of the present invention comprises the first step of forming a first insulating film having a low etching rate on a semiconductor substrate, the second step of processing the first insulating film and the semiconductor substrate to form a pillar projection having a predetermined width on a surface of the semiconductor substrate, the third step of forming a second insulating film only on side surfaces of the pillar projection and the first insulating film, the fourth step of forming a third insulating film having an enough thickness to bury the pillar projection and the first insulating film and polishing the third insulating film by using the first insulating film as a stopper, the fifth step of partially removing the second and third insulating films together with the first insulating film, the sixth step of forming narrow gaps by selectively removing portions of the second insulating film, thereby exposing portions of the two side surfaces of the pillar projection and portions of the surface of the semiconductor substrate near the pillar projection, the seventh step of forming a fourth insulating film covering inner walls of the narrow gaps, the eighth step of doping an impurity into an entire surface to form diffusion layers in an upper surface region of the pillar projection and a surface region of the semiconductor substrate, the ninth step of forming a first conductive film on the third insulating film so as to bury the narrow gaps via the fourth insulating film, and the tenth step of processing the first conductive film to divide the first conductive film.
Still another aspect of the method of fabricating a semiconductor device of the present invention is a method of fabricating a semiconductor device comprising a gate, a source, and a drain, comprising the first step of forming a cap insulating film having a low etching rate on a semiconductor substrate, the second step of processing the cap insulating film and the semiconductor substrate to form a pillar projection having a predetermined width on a surface of the semiconductor substrate, the third step of forming a side-wall insulating film only on side surfaces of the pillar projection and the cap insulating film, the fourth step of forming an element isolation insulating film having an enough thickness to bury the pillar projection and the cap insulating film and polishing the element isolation insulating film by using the cap insulating film as a stopper, the fifth step of partially removing the side-wall insulating film and the element isolation insulating film together with the cap insulating film, the sixth step of forming narrow gaps by selectively removing portions of the side-wall insulating film, thereby exposing portions of the two side surfaces of the pillar projection and portions of the surface of the semiconductor substrate near the pillar projection, the seventh step of forming a gate insulating film covering inner walls of the narrow gaps, the eighth step of forming a conductive film on the element isolation insulating film so as to bury the narrow gaps via the gate insulating film, the ninth step of patterning the conductive film into a gate shape, and the tenth step of forming the source and drain by doping an impurity into the pillar projection by using the conductive film as a mask.
Still another aspect of the method of fabricating a semiconductor device of the present invention is a method of fabricating a semiconductor device comprising a semiconductor substrate and first, second, and third transistor shaving first, second, and third gates and a source and a drain shared by the first, second, and third gates, comprising the first step of forming a cap insulating film having a low etching rate on a semiconductor substrate, the second step of processing the cap insulating film and the semiconductor substrate to form a pillar projection having a predetermined width on a surface of the semiconductor substrate, the third step of forming a side-wall insulating film only on side surfaces of the pillar projection and the cap insulating film, the fourth step of forming an element isolation insulating film having an enough thickness to bury the pillar projection and the cap insulating film and polishing the element isolation insulating film by using the cap insulating film as a stopper, the fifth step of partially removing the side-wall insulating film and the element isolation insulating film together with the cap insulating film, the sixth step of forming narrow gaps by selectively removing portions of the side-wall insulating film, thereby exposing portions of the two side surfaces of the pillar projection and portions of the surface of the semiconductor substrate near the pillar projection, the seventh step of forming a gate insulating film covering inner walls of the narrow gaps, the eighth step of forming a first conductive film on the element isolation insulating film so as to bury the narrow gaps via the gate insulating film and processing the first conductive film into a predetermined shape, the ninth step of forming the source and drain by doping an impurity into the pillar projection by using the first conductive film as a mask, the tenth step of processing the first conductive film to divide the first conductive film on the pillar projection, thereby forming the first and second gates, the eleventh step of forming an insulating interlayer on the first and second gates and processing the insulating interlayer to expose only a portion of the gate insulating film formed on an upper surface of the pillar projection, and the twelfth step of forming a second conductive film on the insulating interlayer including the exposed gate insulating film and processing the second conductive film to form the third gate by patterning.
Still another aspect of the method of fabricating a semiconductor device of the present invention is a method of fabricating a semiconductor device comprising a semiconductor substrate and first and second transistors having first and second gates and a source and a drain shared by the first and second gates, comprising the first step of forming a cap insulating film having a low etching rate on a semiconductor substrate, the second step of processing the cap insulating film and the semiconductor substrate to form a pillar projection having a predetermined width on a surface of the semiconductor substrate, the third step of forming a side-wall insulating film only on side surfaces of the pillar projection and the cap insulating film, the fourth step of forming an element isolation insulating film having an enough thickness to bury the pillar projection and the cap insulating film and polishing the element isolation insulating film by using the cap insulating film as a stopper, the fifth step of partially removing the side-wall insulating film and the element isolation insulating film together with the cap insulating film, the sixth step of forming narrow gaps by selectively removing portions of the side-wall insulating film, thereby exposing portions of the two side surfaces of the pillar projection and portions of the surface of the semiconductor substrate near the pillar projection, the seventh step of forming a gate insulating film covering inner walls of the narrow gaps, the eighth step of doping an impurity into an entire surface to form the drain in an upper surface region of the pillar projection and the source in a surface region of the semiconductor substrate, the ninth step of forming a conductive film on the element isolation insulating film so as to bury the narrow gaps via the gate insulating film, and the tenth step of processing the first conductive film to divide the first conductive film on the pillar projection, thereby forming the first and second gates.
Still another aspect of the method of fabricating a semiconductor device of the present invention comprises the first step of forming a first insulating film serving as an element isolation insulating film on a semiconductor substrate, the second step of processing the first insulating film to form a trench which exposes a portion of a surface of the semiconductor substrate, the third step of forming a polycrystalline silicon film covering the first insulating film so as to bury the trench, the fourth step of forming a second insulating film on the polycrystalline silicon film, the fifth step of processing the polycrystalline silicon film and the second insulating film to form a pillar projection made of the polycrystalline silicon film and a cap insulating film of the pillar projection on the semiconductor substrate in the trench, the sixth step of performing a heat treatment to change the pillar projection into a single crystal, the seventh step of forming a third insulating film on the surface of the semiconductor surface exposed in the trench and side surfaces of the pillar projection, the eighth step of doping an impurity into an entire surface under conditions by which the impurity passes through the cap insulating film and doping an impurity under conditions by which the impurity stops in the cap insulating film, thereby forming a pair of diffusion regions in an upper surface region of the pillar projection and a surface region of the semiconductor substrate, the ninth step of forming a conductive film on an entire surface and processing the conductive film into a predetermined shape, and the tenth step of polishing the conductive film by using the cap insulating film as a stopper until a surface of the cap insulating film is exposed, thereby dividing the conductive film.
Still another aspect of the method of fabricating a semiconductor device of the present invention comprises the first step of forming a first insulating film serving as an element isolation insulating film on a semiconductor substrate, the second step of processing the first insulating film to form a first trench which exposes a portion of a surface of the semiconductor substrate, the third step of forming a polycrystalline silicon film covering the first insulating film so as to bury the first trench, the fourth step of forming a second insulating film on the polycrystalline silicon film, the fifth step of processing the polycrystalline silicon film and the second insulating film to form a pillar projection, which is made of the polycrystalline silicon film and fills the first trench except for a substantially central portion, and a cap insulating film of the pillar projection on the semiconductor substrate in the first trench, the sixth step of performing a heat treatment to change the pillar projection into a single crystal, the seventh step of forming a third insulating film on the surface of the semiconductor substrate exposed in the first trench and side surfaces of the substantially central portion of the pillar projection, the eighth step of forming a first conductive film on an entire surface so as to bury an exposed portion in the first trench, the ninth step of processing the first conductive film and the cap insulating film to expose an upper surface of the pillar projection on two sides of the first conductive film and the cap insulating film, the tenth step of forming a pair of diffusion layers by doping an impurity into the pillar projection from the exposed upper surface of the pillar projection by using the first conductive film as a mask, and the eleventh step of polishing the first conductive film by using the cap insulating film as a stopper to divide the first conductive film by the cap insulating film.
A storage medium of the present invention stores, in a computer readable form, individual steps of an operation of determining multi-valued storage information stored in the semiconductor device described above.
A semiconductor device of the present invention comprises a conductive film (gate) which covers a substantially central portion of a pillar projection, which is integrally formed on a semiconductor substrate, via a first insulating film (gate insulating film), and a pair of diffusion regions (a source and a drain) formed by doping an impurity into those portions of the pillar projection on the two sides of the conductive film. A second insulating film (element isolation insulating film) is so formed as to bury the pillar projection. Three channels are formed from t he conductive film and the pillar projection as will be described below.
That is, a first channel is formed on t he upper surface of the pillar projection by defining the dimension in a direction substantially perpendicular to the longitudinal direction of the conductive film as a gate length L and the dimension in a direction substantially perpendicular to the longitudinal direction of the pillar projection as a channel width W1. Second and third channels are so formed as to oppose each other on the two side surfaces of the pillar projection by defining L described above as the gate length and the height of the pillar projection from the semiconductor substrate as substantially a channel width W2. The channel width W1 also defines the thickness of a depletion layer of a transistor formed by the second and third channels. This results in a behavior equivalent to that a two-gate transistor structure in an SOI structure. If the channel width W1 is made very small, e.g., about 0.15 xcexcm or less, the second and third channels are completely depleted.
That is, in the semiconductor device of the present invention, it is unnecessary to form an element isolation insulating film in the semiconductor substrate because element isolation is performed by the second insulating film. This readily achieves a very high integration degree. Additionally, the pillar projection and the semiconductor substrate are integrally formed. Therefore, very high drivability like that of an SOI structure is achieved although the active region is fixed to the substrate potential.
Furthermore, in the semiconductor device of the present invention, a buried insulating layer crossing the conductive film and having a predetermined film thickness is formed in a predetermined portion of the pillar projection by oxygen ion implantation. Since it is easy to accurately control the formation position of this buried insulating film, the channel width W2 of the second and third channels can be freely set.
Also, a semiconductor device of the present invention comprises first and second conductive films (first and second gates) which cover a substantially central portion of a pillar projection, which is integrally formed on a semiconductor substrate, via a first insulting film (first gate insulating film), and which are electrically isolated from each other, a third conductive film (third gate) which covers a substantially central portion of the upper surface of the pillar projection via a second insulating film (second gate insulating film) and is electrically isolated from the first and second conductive films, and a pair of diffusion regions (a source and a drain) formed by doping an impurity into portions of the pillar projection on the two sides of the first and second conductive films. Accordingly, the semiconductor device of the present invention realizes a structure equivalent to three transistors connected in parallel. By using first to third transistors, a plurality of characteristics having different conductances can be accomplished. For example, four different conductances are achieved when only the first transistor is turned on, only the first and second transistors are turned on, all of the first to third transistors are turned on, and all of the first to third transistors are turned off.
That is, the semiconductor device of the present invention can achieve not only a high integration degree but also a plurality of conductances with very high drivability like that of an SOI structure.
The present invention, therefore, realizes a semiconductor device having a plurality of channels corresponding to a pair of a source and a drain, selectively formed on the same semiconductor substrate as a common bulk transistor, and having a very fine structure and high drivability.